Further TBDR Details

On-chip buffers

Read-Modify-Write operations for the colour, depth and stencil buffers are performed using fast on-chip memory instead of relying on repeated system memory access, as traditional IMRs do. Attachments that the application has chosen to preserve, such as the colour buffer, will be written to system memory.

PowerVR shader engine

The PowerVR shader engine is based on a massively multi-threaded and multi-tasking approach. It is hardware-managed and load-balanced by using a data driven execution model to ensure the highest possible utilisation efficiency. This approach schedules tasks based on data availability, and enables switching between independent processing tasks to ensure that data dependency stalls are avoided at all costs.

Firmware

In many graphics architectures, hardware graphics events are handled on the CPU by the graphics driver. All PowerVR graphics cores are managed by firmware, enabling the graphics processor to handle the majority of high level graphics events internally. This approach keeps event handling latency to a minimum and reduces the graphics driver’s CPU overhead.