Vertex Processing (Tiler)#

Every frame, the hardware processes the submitted geometry data with the following steps:

  1. Application-defined transformations, such as vertex shaders (Vertex Processing), are executed.

  2. The resulting data is converted to screen-space (Clip, Project, and Cull).

  3. The Tile Accelerator (TA) determines which tiles contain each transformed primitive (Tiling).

  4. Per-tile lists are updated to track the primitives that fall within the bounds of each tile.

../_images/tiler.jpg

Each tile in the tile list contains primitive lists that include pointers to the transformed vertex data. The tile list and the transformed vertex data are both stored in an intermediate store called the Parameter Buffer (PB). This store resides in system memory, and is mostly managed by the hardware. It contains all information needed to render the tiles.

../_images/tbdr-architecture.jpg